Dow Electronic Materials


Connectivity provides insights into the materials that are enabling the next generation of electronic devices. Keep your edge with the latest information about recent developments, our product portfolio, and opinions and viewpoints from our industry experts.

2018 Outlook: A Vision for the Semiconductor Industry in China

Mar 20, 2018

Dow’s Shuji Ding-Lee talks with Semiconductor Manufacturing China about market dynamics and opportunities for semiconductor industry growth in China in 2018.

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A market outlook: Will OLEDs Prevail in 2018 Display Markets?

Mar 15, 2018

The display market is in a period of transition, with LCD displays unstable, QDs a bit unknown and OLEDs seemingly in the driver’s seat. Dow’s Hwang shares his thoughts on this exciting market.

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2018 Semiconductor Industry Outlook: Riding a Growth Trend

Mar 13, 2018

Dow’s Adam Manzonie gives his insight on what may extend the semiconductor industry’s growth in 2018. Overall product quality from material suppliers is key in 2018 to meet ever more stringent process control requirements.

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3D InCites: It’s Time to Get Serious About (Advanced Packaging for) 5G

Mar 08, 2018

Dow’s Rob Kavanagh discusses how advanced packaging will be a key asset for the development of 5G and the connectivity of all IoT devices. With the strict design and materials requirements for 5G, this proposes some challenges as well as opportunity for the semiconductor industry.

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SPN Viewpoint 2018: The Fan-Out Conversation and Memory Growth Continue

Feb 15, 2018

In this look ahead to 2018, Rob Kavanagh discusses advanced packaging trends for 2018. With the memory market is on the rise, advanced packaging suppliers will be faced with more challenges.

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Boric Acid-Free Nickel Electroplating: Another REACH Challenge

Jan 22, 2018

EU REACH continues to identify and act potentially harmful substances; boric acid and borate salts may face increased restriction. Dow is developing boric acid replacement electrolytes for nickel, with boric acid-free nickel plating already demonstrated.

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Tailoring Copper Plating for Vias on IC Package Substrates

Nov 28, 2017

IC substrate manufacturers must innovate to be competitive in a landscape where feature dimensions continue to shrink. Copper plating chemistries optimized for IC substrates is one step manufacturers can take toward achieving their production goals.

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How Silver Catalysts Enhance PCB Manufacturing

Oct 31, 2017

Used in many applications, silver catalysts provide a balance of features: good catalytic activity, high electrical conductivity, modest cost, and good process stability. As such, they are increasingly being explored for use in PCB manufacturing.

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Flexible PCBs for Smartphones Need New Metallization Processes

Sep 26, 2017

Consumers are demanding ever-more functionality and battery life from their smartphones, which is driving a need for flexible PCBs (FPCBs). This article looks at design considerations of metallization processes for FPCBs, which will enable future devices.

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Press-Fit Solutions Address Future Automotive Reliability Requirements

Sep 06, 2017

Automotive electronics have long had to meet demanding reliability standards. As a result, automotive PCBs, with millions of through holes, are migrating towards solderless press-fit interconnection solutions as an alternative to soldering.

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Advanced Via Fill for HDI Applications

Aug 01, 2017

The smart phone market is driving improved via fill for HDI substrates, but it will also be needed for several emerging electronics markets. Continuous innovation in copper via fill is needed to meet new requirements.

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The Future Is Cadmium-Free – Bright and Safe!

Jul 27, 2017

A key trend in electronics manufacturing is reducing the use of potentially harmful materials, such as cadmium. As a result, major global display manufacturers are moving away from cadmium-based QDs and committing to adopt cadmium-free QDs technology.

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Inkjet Masking Reduces Gold Usage (and Cost) in Connectors

Jul 19, 2017

In the electrical connector industry, gold is frequently used because of its conductivity. Given its cost, there is a strong manufacturing need for a more effective masking procedure that can be carried out rapidly and offers improved resolution in reel-to-reel production.

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Developing the Chinese Semiconductor Industry Ecosystem

May 25, 2017

With rapid growth occurring in the Chinese semiconductor industry, George Lu posits that the country needs to build out a complete supply chain to compete globally for advanced node manufacturing.

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Role of Additives and Cu Purity in Advanced Package Reliability

May 02, 2017

Part 2 of our series on metallization examines the impact high density fan-out (HD FO), 2.5D and 3D packaging has on Cu plating requirements, and the role additives play in meeting requirements for advanced package reliability.

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Market Drivers for Advanced Packaging Metallization

Apr 04, 2017

Advanced wafer-level packaging technologies hold the key to meeting the future needs of electronic devices. This requires advances in electronic materials, and advanced metallization technologies are no exception.

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Advancing the Thick PCB Manufacturing Process for 5G Infrastructure

Mar 20, 2017

The demand for thick PCBs is increasing, presenting a challenge and an opportunity for copper plating. Here, we look at how Dow is advancing the thick PCB manufacturing process to support the growth of 5G infrastructure

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Moving into China: Advances in Next-Generation Displays

Mar 07, 2017

China’s display market is growing rapidly, and if SID hosting its first-ever conference there is any indication, it is well on its way. Kathleen O’Connell offers an overview of her plenary session, explaining how multiple display technologies have room to succeed.

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2017 Outlook: Semiconductor Market Forecast Calls for Continued Collaboration

Feb 16, 2017

The semiconductor market forecast is strong for 2017. Dow's Colin Cameron discusses market drivers and the value of continued collaboration in an editorial for Solid State Technology.

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Will Fan-out Panel-Level Packaging Really Happen?

Feb 14, 2017

The advanced semiconductor packaging industry is considering a shift to fan-out panel-level packaging. Here, Dow’s Rozalia Beica and Monita Pau examine the challenges this new technology is facing.

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Why Converting Tin Electroplating Lines Makes Sense Now

Feb 07, 2017

Increasing concerns about toxicity and materials waste when tin-plating steel pose compelling reasons to convert existing PSA/ENSA plating lines to MSA, which provides benefits in cost, quality and environmental safety.

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2017 Outlook: Lithography Materials Support Growth in China

Jan 31, 2017

Shuji Ding-Lee discusses the role lithography materials play in enabling next-gen technologies, as well as the growth of China’s IC market and requirements for materials suppliers.

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Transitioning to Chromium-Free Etch Technology for Plating on Plastics

Jan 24, 2017

Dow reports on its progress towards a plating on plastics (POP) process free from hexavalent chromium to comply with REACH legislation

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The Science Behind the Screen: LCD TVs Keep Getting Better

Jan 23, 2017

This post examines the benefits of the latest TFT technology for next-gen displays, specifically, the impact of organic insulator (NPL) materials, which are becoming indispensable for large, high-resolution, high-contrast LCD TVs.

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2017 Outlook: Trends in Advanced Packaging and China’s Role

Jan 18, 2017

With 2017 just getting underway, Dow business leaders have been examining trends and challenges the semiconductor industry will face. Here, Rob Kavanagh reviews significant changes in the advanced packaging space over the past year and identifies trends that will influence 2017, including growth in China.

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2017 Outlook: Fan-out Wafer Level Packaging Goes Mainstream

Jan 13, 2017

Dow’s Rob Kavanagh joins other Dow leaders voicing their opinions on what’s coming in the semiconductor industry in the new year. In his 2017 outlook for Semiconductor Packaging News, Kavanagh looks at what’s needed to meet the challenges of fan-out water level packaging.

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Autonomous Cars Are Driving the Next Gen of PCB Material Requirements

Nov 23, 2016

Cars increasingly rely on PCBs with chips that control everything from safety to passenger comfort and convenience. This is driving a need for highly reliable PCB materials that not only survive in a harsh environment, but also pass stringent thermal reliability tests that demonstrate long-term stability.

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The Present and Future of OLED Materials Development

Oct 13, 2016

At the Global Materials Tech Fair in Seoul, Dow’s senior R&D manager Dai-Kyu Kim, recently delivered a lecture on the present and future of organic light emitting diode (OLED) materials development. Kim addressed the market outlook for OLEDs, including the evolution of OLED displays, and Dow’s contributions to the growth of the overall OLED display industry.

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CMP Solutions for 10nm and Beyond

Oct 04, 2016

As manufacturers plan for 10nm and future nodes, requirements for chemical mechanical planarization (CMP) defect levels become increasingly challenging. Due to the stringent CMP requirements for front-end planarization of finFET devices, new materials will be needed to achieve high planarization efficiency and low defect rates, ensuring reliable CMP for the next generation of finFET devices.

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Managing Material Properties of Fan-out Wafer-Level Packages

Aug 30, 2016

Advanced packages require specialty electronic materials to be made profitably and reliably. Fan-out wafer level packaging (FOWLP), has three key structures to consider: the dielectric layer, the redistribution layer (RDL), and Cu pillars. Part two of this two-part FOWLP series investigates these key structures and considerations for managing material properties.

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Becoming REACH Compliant: Is your Pure Gold Pure Enough? Part 2 of 2

Aug 25, 2016

The need to become REACH compliant created demand for an arsenic-free, lead-free pure gold electroplating solution. Part 2 of this series addresses available alternatives to standard products, allowing manufacturers to be REACH compliant with pure gold wirebonding.

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Are you ahead of the curve for REACH compliance? Part 1 of 2

Aug 16, 2016

REACH compliance is impacting the chemical industry worldwide, impacting everyone from raw material producers and suppliers to OEMs. In this two-part series, we will share Dow’s specific strategies and examples to ensure products are REACH compliant. Part 1 looks at the REACH landscape and key considerations for suppliers.

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Via Fill’s Role in the Evolution of Portable Electronics

Jul 21, 2016

Cellphones have evolved considerably in the past 20 years, both in terms of form and function, as the market has exploded globally. Development of cellphone technology has been a major driver for advances in semiconductor packaging and printed circuit board (PCB) design, and via fill plays an important role.

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Fan-Out Wafer-Level Packaging and Its Material Evolutions

Jul 06, 2016

Recently, FOWLP has become one of the hottest advanced packaging technologies. New market drivers, namely the Internet of Things, that require miniaturized system-in-package solutions are bringing FOWLP to the forefront. Part one of this two-part series, we examine the back-story of FOWLP and the markets it serves.

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Enabling Advanced PCB HVM with Nickel-Free Copper Plating

Jun 09, 2016

Advanced PCBs for high-density packaging require copper metal interconnects for both horizontal traces as well as vertical micro-via holes. Cost-effective manufacturing requires that fine-line traces and micro-via holes be formed using the same HVM processes. Learn how nickel-free electroless copper plating chemistry enables fine-pattern plating needed in advanced IC substrates.

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Extending Lithography Capability with Specialty Materials, Part 2 of 2

Apr 25, 2016

Improvements with pattern resolution capabilities can no longer keep up with dimension scaling for semiconductor integrated circuits. Now facing lithography challenges at the nanoscale topography of advanced CMOS finFET, Part 2 of this series examines the issues associated with removing photoresist from advanced finFET structures post-ion-implantation.

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Extending Lithography Capability with Specialty Materials, Part 1 of 2

Apr 05, 2016

The industry is facing several lithography challenges related to scaling, due largely to limitations with patterning resolution. This two-part series offers an overview of the challenges presented by further scaling and how extensions to lithography capability allow for patterning of smaller features.

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Is REACH Regulation changing the products you use?

Mar 29, 2016

With REACH regulations now reaching the 10-year mark, manufacturers globally are well on the road to compliance. No longer limited to the EU, many other countries are adopting similar requirements. In this article, we look at Dow’s efforts to meet REACH benchmarks.

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Wafer Bumping Considerations: The importance of the interface between metal layers

Mar 15, 2016

Many new assembly processes are in development, including ultra thinning of wafers to enable stacked die, package-on-package (PoP) and ultra-thin packages. Wafer-level packaging (WLP) to improve reliability and I/O count, ball pitch and routability are also imperative. This post provides an introduction on materials considerations for the interface between metal layers in wafer bump structures.

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2016 Outlook: Trends Driving Packaging Materials Development

Jan 25, 2016

If 2015 goes down in history as the year of 3D stacked memory, then it looks like 2016 may be remembered as the year for the first big adoptions of FOWLP. Dow’s Rob Kavanagh takes a look at the year ahead and the trends driving advanced packaging materials development.

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Advanced Packaging Materials Adding More Value to ICs

Jan 22, 2016

Dow Electronic Materials’ Rob Kavanagh takes a look at the state of materials for advanced packaging in his 2016 Outlook now featured on Solid State Technology.

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Silver Plating Technology Driving 200°C Automotive Apps

Nov 30, 2015

Automotive applications have a unique set of requirements for electronics, not the least of which is high temperature. Silver plating connectors offers many benefits: electrical conductivity, visual appearance, solderability and corrosion resistance. This article examines how Dow R&D overcame technical challenges to develop a flexible, high-performance solution for automotive applications.

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Meeting the Horizontal Electroless Copper Plating Challenge with an Ionic Palladium Catalyst Process

Nov 02, 2015

Packaging density of electronic circuits continues to increase and must be defect-free after electroless plating. New innovations are required to meet changing demands on reliability and the increased complexity of HDI and IC package substrate boards. This post introduces Dow’s approach to horizontal electroless Cu plating to meet these challenges.

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Developing CMP Consumables for New IC Materials

Oct 20, 2015

The semiconductor industry has pushed the limits of miniaturization such that new materials will need to be integrated into more complex structures to continue further scaling. Given the vast number of materials interactions, CMP R&D requires a systems perspective to comprehend the optimal combination of pad and slurry for a target application.

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CMP Cost Reduction by Optimal Pad Selection

Aug 25, 2015

Yield loss is widely recognized the greatest cost in high-volume manufacturing (HVM) of commercial integrated circuit IC devices, and so significant cost-reduction comes from improving device yields. This article explores how CMP pad design can reduce defects, leading to higher wafer yields.

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Addressing Changing Via Fill Requirements for the New Generation HDI PCBs in Industry-Leading Fine-pitch Applications

Aug 17, 2015

Today’s high density interconnect (HDI) printed circuit boards (PCBs) increase the functionality of a circuit board while utilizing less area. This article looks at how to solve the challenge of copper (Cu) via-filling HDI structures that meet requirements for complete via-fill of laser micro-vias while simultaneously plating through holes to enable advanced features in electronic devices.

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Chromium-Free Etch Technology for Plating on Plastic

Jul 24, 2015

Regulatory changes are affecting the plating on plastic (POP) industry. Manufacturers who plate acrylonitrile butadiene styrene (ABS) as part of their POP manufacturing work flow need a way to eliminate the use of hexavalent chromium before the September 21, 2017 sunset date set by REACH.

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3D TSV Plating and Bumping: Rising to the Challenge

Jul 22, 2015

3D integration using through silicon vias (TSVs) promises a fundamental shift for current multi-chip integration and packaging approaches, but it brings more difficulties in Cu electroplating. This piece explores process and material optimization efforts to enable volume manufacturing of 3D ICs.

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CMP Pad Selection for 28nm Node and Beyond

Jul 07, 2015

The “one-size-fits-all” approach to CMP processing is no longer viable; a tunable platform of products is required to meet manufacturers ever-evolving and more technically challenging manufacturing needs. The IKONIC™ CMP pad platform is uniquely positioned to address future IC fabrication requirements because of the tunability of its materials properties.

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Solving Data Center Reliability Challenges through Packaging

Jul 07, 2015

The semiconductor industry is approaching a point where 2.5D and 3D integration technologies will be required to achieve the performance, bandwidth and storage required of next-generation data centers and mobile devices. In this piece, Wataru Tachikawa explores how the entire ecosystem is rolling up its sleeves and working to overcome the remaining challenges.

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