Semiconductor Packaging Materials

Copper Pillar Plating

Production-Proven for Wafer Level Packaging

With production-proven metallization processes for high- and low-speed plating, DuPont Electronics & Imaging’s copper pillar products meet the strict requirements for today’s fine-pitch Cu pillar, Cu stud, and Cu µpillar processes used in advanced wafer-level packaging architectures, from flip-chip processes, to 2.5D and 3D integration schemes. Its additives and high-purity formulation address a wide process window, and are designed to work in perfect harmony with our under-bump metallization (UBM) and tin-silver capping chemistries to provide a seamless solution.

DuPont Electronics & Imaging Cu plating chemistries’ stand-out features include:

  • High plating speed
  • Excellent thickness uniformity
  • Pure copper deposition
  • Tunable shape
  • Copper (Cu) pillars offer a finer-pitch alternative to solder bumps to form interconnects between the chip and the package substrate, interposer, or other chips in 3D integration schemes. They are fabricated on top of under bump metallization (UBM) using photolithography and deposition processes and are capped with tin-silver to form the electronic interconnect.

  • As pitch requirements continue to shrink, copper pillars can enable higher-density designs while maintaining consistent bump heights. The next-generation technology will feature pillars as narrow as 10 to 30 µm. DuPont Electronics & Imaging’s Cu plating chemistries are designed to be ultra-pure and balanced to deliver the optimal intermetallic layer at the interface and void-free pillars at consistent heights.

Semiconductor Packaging Materials

  • Copper Pillar Plating
  • Copper Redistribution Layer
  • Solder Bump Plating
  • Under Bump Metallization
  • Bump Plating Photoresists
  • Through Silicon Via Copper
  • Packaging Dielectrics

Copper Pillar Plating

Our production-proven Cu pillar formulations work in perfect harmony with our under-bump metallization (UBM) and tin-silver capping chemistries, to provide a seamless solution for all your Cu pillar needs.

Copper Redistribution Layer

DuPont Electronics & Imaging copper chemistries for redistribution layers (RDLs) are ideally suited to today’s high-density requirements for wafer level packaging applications.

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Solder Bump Plating

DuPont’s award-winning Solderon™ BP electroplating chemistries are a reliable alternative to tin-lead alloys for all wafer bumping applications.

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Solderon™ BP 1000 Indium Chemistry

Indium plating chemistry designed for low-temperature solder plating processes used in advanced wafer-level packaging for emerging applications that are sensitive to temperature.

Solderon™ BP TS 6000 Tin-Silver Plating Chemistry

HVM-proven tin-silver plating chemistry for lead-free, fine-pitch solder bump applications with industry-leading process versatility.


Under Bump Metallization

We offer a production-proven electroplating nickel chemistry tailored to meet a variety of UBM process needs

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Bump Plating Photoresists

DuPont offers positive- and negative-tone photoresists designed to meet the tight pitches and varied topographies of today’s semiconductor advanced packaging applications.

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Dry Film Photoresists for WLP

Wafer-level packaging dry-film photoresist solutions for 3DIC, fan out, bumping, copper pillar and redistribution applications.

Liquid Photoresists

DuPont offers liquid bump plating photoresists, along with associated ancillaries, that are ideally suited for wafer-level packaging applications using single-spin coating.


Through Silicon Via Copper

Years of experience and success in electroplating damascene copper have helped DuPont bring leading-edge copper TSV chemistries to the advanced packaging market.

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Packaging Dielectrics

Look to DuPont for packaging dielectric formulations that have the mechanical properties, high resolution, low-temp curing, easy processes, and superior reliability needed to protect your advanced WLP.

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