Semiconductor Packaging Materials

Copper Redistribution Layer

Ideally Suited for Fan-in and Fan-out Wafer Level Packaging

DuPont Electronics & Imaging copper chemistries for redistribution layers (RDLs) are ideally suited to today’s high-density requirements, enabling RDL patterns for fan-out wafer level packages to meet next-generation line/space requirements down to 2 µm. Our easy-to-use, high-purity copper electroplating chemistries are formulated to enhance reliability of fine-line RDL and improve via-filling performance. They provide:

  • Optimum uniformity
  • High purity and reliability
  • Superior via-filling performance
  • Reduced manufacturing costs


  • Intervia™ 8540
  • Intervia™ 9000
  • Copper RDL is an interconnect technology used in both fan-in and fan-out wafer level processing. It allows high-density I/Os to be redistributed for connection to the circuit board by increasing the pitch.

    Additionally, the purity of the Cu formulation reduces manufacturing costs by eliminating the nickel barrier between the copper and solder elements required by other plating approaches to control topography and eliminate defects.

  • Driven by mobile applications that require increased functionality at lower power, RDL requirements are tightening from 5 µm line/space to 2 µm line/space. This calls for plating chemistries that can achieve high reliability with low-within-die uniformity.

    The function of additives in RDL plating is similar to those in Cu pillar plating. DuPont’s INTERVIA 9000 plating chemistry can be used for both RDL and Cu pillar plating in one plating tool without changing the plating bath, making it an economical choice.

Semiconductor Packaging Materials

  • Copper Redistribution Layer
  • Copper Pillar Plating
  • Solder Bump Plating
  • Under Bump Metallization
  • Bump Plating Photoresists
  • Through Silicon Via Copper
  • Packaging Dielectrics

Copper Redistribution Layer

DuPont Electronics & Imaging copper chemistries for redistribution layers (RDLs) are ideally suited to today’s high-density requirements for wafer level packaging applications.

Copper Pillar Plating

Our production-proven Cu pillar formulations work in perfect harmony with our under-bump metallization (UBM) and tin-silver capping chemistries, to provide a seamless solution for all your Cu pillar needs.

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Solder Bump Plating

DuPont’s award-winning Solderon™ BP electroplating chemistries are a reliable alternative to tin-lead alloys for all wafer bumping applications.

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Solderon™ BP 1000 Indium Chemistry

Indium plating chemistry designed for low-temperature solder plating processes used in advanced wafer-level packaging for emerging applications that are sensitive to temperature.

Solderon™ BP TS 6000 Tin-Silver Plating Chemistry

HVM-proven tin-silver plating chemistry for lead-free, fine-pitch solder bump applications with industry-leading process versatility.

Under Bump Metallization

We offer a production-proven electroplating nickel chemistry tailored to meet a variety of UBM process needs

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Bump Plating Photoresists

DuPont offers positive- and negative-tone photoresists designed to meet the tight pitches and varied topographies of today’s semiconductor advanced packaging applications.

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Dry Film Photoresists for WLP

Wafer-level packaging dry-film photoresist solutions for 3DIC, fan out, bumping, copper pillar and redistribution applications.

Liquid Photoresists

DuPont offers liquid bump plating photoresists, along with associated ancillaries, that are ideally suited for wafer-level packaging applications using single-spin coating.

Through Silicon Via Copper

Years of experience and success in electroplating damascene copper have helped DuPont bring leading-edge copper TSV chemistries to the advanced packaging market.

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Packaging Dielectrics

Look to DuPont for packaging dielectric formulations that have the mechanical properties, high resolution, low-temp curing, easy processes, and superior reliability needed to protect your advanced WLP.

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